A DMOS-transistor and a fabrication method thereof in the above mentioned general field are known from the German Patent Laying-Open Publication DE 101 31 705 A1, as well as the counterpart U.S. Pat. No. 6,780,713 (Bromberger et al.), the entire disclosure of which is incorporated herein by reference.
In general, a DMOS-transistor is distinguished from a typical Metal Oxide Semiconductor (MOS) transistor in that the DMOS-transistor additionally has a drift region extending between an edge of a control gate and a drain region of the transistor. Such a drift region is a region in which the motion of the charge carriers is caused or effected only by an electric field prevailing between or across the respective opposite ends of the region. In a Lateral DMOS-transistor (LDMOS-transistor), the drift region extends in a lateral direction between the edge of the control gate and the drain region which is displaced from the control gate in the lateral direction.
DMOS-transistors are used as high voltage components in applications in which so-called drain voltages of more than 100 V can be applied between the drain region and the source region of the transistor.
It is known from U.S. Pat. No. 5,539,238 (Malhi) to produce a DMOS-transistor with a deep trench structure, wherein the drift region of the transistor is formed by doped regions adjoining the sidewalls and the floor of the trench. Because the drift region is formed or extends partially in a vertical direction along the sidewalls of the trench, the horizontal length or surface area of the transistor can be reduced. It is a disadvantage in such a conventional DMOS-transistor with a trench, however, that when a blocking or off-state voltage is applied, inhomogeneities of the potential curve or pattern arise at the corners of the trench structure, i.e. where the walls meet the floor, and these inhomogeneities lead to an undesired reduction of the blocking or off-state voltage. Moreover, the total length of the drift region is not reduced in such a conventional trenched DMOS transistor, but merely divided into two substantially vertical portions and one lateral portion. In other words, for this reason, the specific turn-on resistance Rsp=Rdson/area is not reduced, which would be desirable however. To the contrary, the sidewall regions can only be insufficiently doped, and the specific turn-on resistance Rsp and therewith the surface area or “real estate” or “footprint” consumed by the transistor are undesirably increased.
A further DMOS-transistor and a method of producing it are known from the European Patent Application Publication EP 0,837,509 A1. Therein, a self-adjusting drift region is formed under a LOCOS (LOCal Oxidation of Silicon) oxide in a DMOS-transistor. In the known fabrication process, it is disadvantageous that the doping of the drift region is introduced before the oxidation step, and the proportion of the dopant that diffuses into the oxide during the subsequent oxidation can only be inaccurately determined. Furthermore, the high temperature loading that results during the thermal oxidation step leads to a very broad or wide dopant distribution, which in turn causes an even greater inaccuracy of the dopant concentration. Furthermore, a rather large thickness of silicon is necessary below the oxide in order to increase the blocking or off-state voltage by means of the so-called (and per se known) “RESURF” (REduced SURface Field) effect. The field reduction in this context results from a reduced charge carrier concentration in the drift region. Finally, in general, due to process variances or tolerances in the fabrication process, rather large and undesirable variances arise in the electrical parameters of the fabricated transistors.
A primary goal of research and development in the field of DMOS-transistors is to further reduce the dimensions of structures, that exhibit or comprise low field strengths in connection with an applied blocking or off-state voltage, in order to avoid a generation of charge carriers that would lead to a breakdown within the component. A further goal in the development of DMOS-transistors is to achieve a low specific turn-on resistance Rsp. This is to reduce the surface area consumed by integrated circuits in which DMOS-transistors represent a substantial proportion of the total chip surface area.